![]() The unprefixed opcodes 0x and 1x they formerly occupied are instead used for stack-pointer relative addressing. The bit manipulation instructions have been changed to take a 16-bit address and to require the 72 prefix byte. A new prefix byte 72 has been added, and used to encode indirect starting with a 16-bit address. Indirect addressing modes which fetch an 8-bit address from memory (opcodes 92 2x, 92 3x, 92 Bx, 92 6x, 92 Ex, 91 6x, and 91 Ex) have been deleted all indirect addressing modes fetch 16-bit addresses. ![]() X), rather than dividing it between X and A. The multiply instruction stores the 16-bit product in the specified index register (e.g. Interrupts push nine bytes of state instead of five as on the ST7. ![]() (Also, the half-carry flag has been changed to reflect the carry from bit 7 to bit 8 of the 16-bit result, rather than the carry from bit 3 to 4.) Thus, loads and stores access two bytes of memory rather than one. Operations on the X and Y registers are extended to 16 bits. The STM8 instruction set is mostly a superset of the ST7's, but it is not completely binary compatible. Besides C there is the open-source STM8 eForth, an interactive Forth system for the STM8. ![]() The STM8 is supported by the free Small Device C Compiler, the free of charge closed source Cosmic C compiler, and the non-free IAR C and Raisonance compilers. STNRG Pulse-width modulation-controllers.There is an overflow flag, and a second interrupt enable bit, allowing four interrupt priority levels. The condition code register has two more defined bits, for a total of seven. The accumulator A and the stack pointer remain 8 and 16 bits, respectively. It has the same six registers (A, X, Y, SP, PC, CC) as the ST7, but the index registers X and Y have been expanded to 16 bits, and the program counter has been expanded to 24 bits. Random access to data above 64K is limited to special "load far" instructions most operations' memory operands can access at most 128K (a 16-bit base address plus 16-bit offset).ĭepending on the device type, the amount of RAM is in the range of 1 to 6 KiB, and the amount of ROM is 4 to 8 KiB (Low density), 16 to 32 KiB (Medium density), or 32 to 96 KiB (High density). ![]() Code execution from the EEPROM is denied and creates a reset event. On access the "memory bridge" stalls the CPU if required so that RAM-like write access to the flash ROM is possible. Although internally a Harvard architecture it has "memory bridge" that creates a unified 24-bit address space, allowing code to execute out of RAM (useful for in-system programming of the flash ROM), and data (such as lookup tables) to be accessed out of ROM. The STM8 is very similar to the earlier ST7, but is better suited as a target for C due to its 16-bit index registers and stack pointer-relative addressing mode. ![]()
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